1. Field of the Invention
The present invention generally relates to computer hardware and more specifically to using error-correcting code bits as additional register file storage.
2. Description of the Related Art
A conventional memory unit may include billions of bits of data, each of which is stored by a set of transistors within the memory unit. Certain environmental conditions can affect the transistors that store a particular bit, causing the bit to be “flipped” (i.e., changed from a “1” to a “0” or from a “0” to a “1”). For example, a neutron or an alpha particle could impact a transistor in the set of transistors, causing those transistors to store a “1” instead of a “0,” or vice versa.
Some data, such as financial data or medical data, is highly sensitive to bit flips and must be discarded even when just one bit is flipped. To ensure that none of the bits included in the memory unit have been flipped, the memory unit may also include “error-correcting code” (ECC) bits. ECC bits can be used to identify bits that have been flipped.
Some processing units may include internal memory units that implement ECC bits to ensure the integrity of stored data. These processing units may be provided to customers who require a high degree of data integrity (i.e., zero flipped bits) as a value-added feature. However, processing units that implement ECC bits may also be supplied to customers that do not require a high degree of data integrity. In this situation, the ECC bits are extraneous, and, thus, waste valuable processing unit area without providing any benefit.